A simple 4-bit computer is built on breadboards using individual transistors. This computer is called the GSN477. This is because it was built for the Global Science Network, is 4-bit, and contains two 7-stage counters.
Sections of the computer are the clock, program counter, ring counter, 10 bytes of memory, opcode register, opcode decoder, control matrix, data bus, accumulator register, output register, register B, and ALU.
Circuits are built using NAND digital logic gates, XOR gates, AND gates, inverters, buffers, and tri-state buffers. Larger circuits include D flip Flops, MS D flip flops, Edge triggered JK flip flops, and MS JK flip flops.
The computer shows how computers add and subtract numbers while running a simple program and this video was submitted for the #some3 competition.
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промт — Сделай обзор на текст, выдели основные мысли
От простого калькулятора до искусственного интеллекта
- Создание 4-битного компьютера: Автор построил простой 4-битный компьютер, используя отдельные транзисторы, и объясняет, как он это сделал.
- Разъяснение работы компонентов: Видео подробно описывает работу каждого компонента компьютера, включая часы, счетчики программ, память, регистры и другие элементы.
- Практические советы: Автор дает рекомендации тем, кто хочет повторить его проект, начиная с создания калькулятора, который затем можно будет использовать как часть более сложного устройства.
- Планирование будущих проектов: Автор упоминает о своем намерении создать искусственный интеллект и делиться дальнейшими этапами этого процесса в следующих видео.
- Уникальность проекта: Автор подчеркивает, что его подход к созданию компьютера с нуля, используя только транзисторы, позволяет лучше понять фундаментальные принципы работы компьютеров.
промт — предложи варианты заголовка текста
Варианты заголовков
- «Построение 4-битного компьютера с нуля»
- «Как собрать собственный компьютер на транзисторах»
- «От простого калькулятора до искусственного интеллекта»
- «Фундаментальные основы электроники: создание компьютера своими руками»
- «Путешествие в мир цифровых технологий: создание 4-битной вычислительной машины»
промт — предложи варианты картинок к тексту
Конечно! Вот несколько вариантов изображений, которые могут подойти к описанию построения 4-битного компьютера на транзисторах:
- Изображение макетной платы:
- Макетная плата с установленными на ней транзисторами, резисторами и другими электронными компонентами.
- Схема компьютера:
- Блок-схема, показывающая основные компоненты компьютера, такие как часы, счетчик программы, память, регистры и т.д.
- Процесс сборки:
- Руки, соединяющие провода и устанавливающие компоненты на макетную плату.
- Готовый компьютер:
- Законченный компьютер с мигающими светодиодами и дисплеем, отображающим результат вычислений.
- Автор за работой:
- Человек (возможно, автор) за столом, собирающий компьютер или проверяющий его работоспособность.
- Микросхемы и инструменты:
- Различные электронные компоненты, такие как транзисторы, резисторы и микросхемы, а также инструменты, используемые при сборке, например, паяльники и мультиметры.
- Диаграмма работы компонентов:
- Диаграммы, иллюстрирующие работу различных частей компьютера, таких как работа часов, принцип действия триггеров и т.п.
Эти изображения помогут визуально передать процесс создания и функционирования 4-битного компьютера, построенного на транзисторах.
картинка https://giga.chat/link/gcsBOlxPvk
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Intro.
0:00
hello my smart and talented friends and
0:03
welcome to the Global Science Network I
0:05
am super excited because I finished
0:07
building this 4-bit computer using
0:09
individual transistors it is estimated
0:12
that there have been over 100 billion
0:14
people that have lived and in my opinion
0:16
the computer is the coolest invention
0:18
humans have ever made I spent the last
0:20
several months building this very simple
0:22
computer which should allow me to
0:24
explain the fundamentals of how a
0:26
computer works if you have not watched
0:28
my other videos this may seem
0:30
complicated but if you break it down
0:31
into individual sections it becomes
0:34
quite simple understanding these
0:35
fundamentals of electronics will be
0:37
important because after this we are
0:39
going to build artificial neurons and
0:41
non-biological Life as we work towards
0:43
creating non-biological human
0:45
consciousness everyone should know how
0:47
to build a computer at the transistor
0:49
level so please share this video the
Computer overview.
0:51
computer is powered with a 5 Volt 2 amp
0:54
battery pack if we look at the
0:55
multimeter we can see it uses just over
0:57
one amp of current it is built on 32ft
1:00
full-size breadboards and uses about 962
1:03
npn transistors the different circuits
1:06
of the computer include the clock
1:08
program counter ring counter 10 bytes of
1:12
memory
1:13
opcode register op code decoder control
1:17
Matrix data bus accumulator register
1:21
output register register B and ALU let’s
1:26
run a quick example program and then
1:27
talk about how each section of the
1:29
computer is built the program is going
Example program.
1:31
to load the a register with a value of 1
1:34
add 2 add 2 add 2 subtract 3 output the
1:39
value of 4 and then halt the processor
1:42
first the battery is connected to the
1:44
computer connecting reset to ground on
1:46
the data bus will clear the output
1:48
register and set the counters to 1. now
1:51
the program is running the first thing
1:53
to notice is that the ring counter is
1:55
incrementing one to seven as the ring
1:58
counter increments it enables different
2:00
circuits in the computer to send and
2:01
receive data for example when the ring
2:04
counter goes back to one It enables the
2:06
program counter to increment the seven
2:08
values of the program counter are
2:10
connected to the first seven bytes of
2:12
memory these seven bytes of memory
2:14
contain the seven operational codes the
2:16
computer is running the opcode values
2:18
are shown here and correspond to these
2:21
memory locations an example of the
2:23
opcode being used is when the program
2:24
counter has a value of 5. the fifth
2:27
memory location will be used which
2:29
contains the opcode value 0 0 1 1 when
2:32
the ring counter has a value of 2 the
2:35
opcode value will be placed onto the bus
2:36
and last into the opcode register the
2:39
opcode decoder will output 0 1 0 0 which
2:42
means this is the subtract command when
2:44
the ring counter goes to 4 the subtract
2:47
value from memory location 10 is placed
2:49
on the data bus and loaded into register
2:51
B finally when the ring counter goes to
2:53
5 the subtract circuit is enabled the
2:56
ALU is connected to the data bus and the
2:58
ALU output value of 7 minus 3 which is 4
3:02
is latched into the accumulator register
3:04
now let’s watch the entire program run
3:06
from start to finish Step 1 the value of
3:10
1 is loaded into the accumulator
3:11
register
3:15
step 2.
3:17
add is on the decoder 2 is placed in
3:20
register B one plus two is three
3:24
step three
3:25
ad is on the decoder two is placed in
3:28
register B three plus two is five
3:32
step four
3:33
add is on the decoder two is placed in
3:36
register B five plus two is seven
3:40
step five
3:42
subtract is on the decoder three is
3:44
loaded into register b seven minus three
3:46
is four
3:48
step six
3:50
output is on the decoder the a register
3:52
value is placed onto the bus which gets
3:55
latched into the output register
3:57
step seven
3:58
halt is on the decoder
4:02
the clock output is sent to ground when
4:04
the ring counter hits seven this halts
4:06
the computer the program is complete now
4:09
let’s talk about how each section of the
4:10
computer is built we will start with the
The clock
4:13
clock the clock is an a stable
4:14
multivibrator which is connected to the
4:16
ring counter and data bus via the data
4:20
bus the clock also connects to these
4:21
other circuits next let’s talk about the
Ring Counter
4:24
ring counter the seven stage ring
4:26
counter is built with 7 Edge trigger JK
4:28
flip-flops the triggers for each
4:30
flip-flop use a small capacitor here is
4:33
a diagram showing one JK flip-flop and
4:35
here is a diagram showing how the
4:36
flip-flops are connected all of the
4:38
flip-flops are connected to buffers to
4:40
allow information to be sent to other
4:42
circuits The Edge triggered JK
4:44
flip-flops could be built with Master
4:46
Slave JK flip-flops but using the
4:48
capacitor and resistor as a trigger
4:50
makes it so significantly fewer
4:51
transistors are needed the program
Program Counter
4:53
counter is also built with 7 Edge
4:55
triggered JK flip-flops it is common for
4:58
the program counter to be a binary
5:00
counter which I showed in a previous
5:01
video however it is easier to interface
5:04
with our memory module using a second
5:06
ring style counter this is because the
5:08
memory module would have to decode the
5:10
binary value to know which byte of
5:12
memory to enable the output of the
5:14
memory module decoder would be very
5:15
similar to the output the ring counter
5:17
provides if you want to know how a
5:19
decoder works this computer has a
5:21
decoder for the opcode values the seven
5:23
program counter values are connected to
5:25
the first seven bytes of memory which
5:27
contain the opcode instructions since
5:29
the counter helps fetch the program
5:30
instructions it can be called the
5:32
program counter let’s discuss how the
10 Bytes of Memory
5:34
memory module is built the values of the
5:36
10 bytes of memory are set before the
5:38
program starts and the values do not
5:40
change this is read-only memory this
5:43
module is actually simplified even for
5:45
read-only memory as each bit is a buffer
5:47
that is hard coded based on resistor
5:49
connections to positive or ground this
5:52
makes it so only two transistors are
5:54
needed per bit rather than needing a
5:55
data flip-flop and buffer for each bit
5:58
making the memory module much more
6:00
compact we would have needed 40 data
6:02
flip-flops just to make 10 bytes of
6:04
4-bit memory the buffer is used in the
6:07
memory module are simple Tri-State
6:08
buffers that invert the input the
6:10
buffers are active low which means they
6:12
are enabled when connected to ground on
6:15
the symbol the two pins have a dot
6:16
bubble or Circle to show that an
6:18
inverted signal is needed or is being
6:20
output the first seven values contain
6:23
the opcode instructions for the computer
6:24
the eighth byte has the value used for
6:27
the load a command the ninth byte
6:29
contains the value for the add command
6:30
and the 10th byte has the value for the
6:33
subtract command another part of the
6:34
memory module is the Tri-State buffer is
6:36
used to enable each byte of memory this
6:38
breadboard also has the display which
6:41
shows when a particular byte is being
6:42
accessed the input to enable each byte
6:45
needs to be low which is why these seven
6:46
inverters are needed each Tri-State
6:48
buffer is also connected to an open
6:50
collector buffer in the control Matrix
6:52
to allow the Tri-State buffers to be off
6:54
when the memory module is not being used
6:56
if we were not trying to display when
6:58
each byte is accessed this could have
7:00
been built in a simpler way the opcode
Opcode Register
7:02
register is built with four Master Slave
7:04
data flip-flops the opcode instruction
7:06
that latches into this register is a
7:08
binary number this binary number is sent
Opcode Decoder
7:11
directly into the opcode decoder the
7:13
opcode decoder will decode each possible
7:15
binary number into a single on value
7:18
which can be used by the control Matrix
7:20
the decoder is built with five three
7:22
input nand Gates since only five
7:24
instructions are used only the first
7:27
three bits are decoded the way the three
7:29
input nand gate decodes the number is
7:31
fairly simple when all of the inputs are
7:33
on the output of the nand gate is off
7:35
which turns the inverter on so the
7:38
output for the circuit is on there are
7:40
also inverters before the nand gate
7:42
which enable the inputs to the nand gate
7:44
to be on or off depending which side of
7:46
the inverter the input is connected to
7:48
for example to decode 3 the output of
7:51
the third nand gate needs to be off so
7:54
the output inverter will turn the output
7:56
on the nand gate will turn off when all
7:59
the inputs are on
8:00
this is done by conducting the first two
8:02
inputs before the input inverters and
8:05
the third input to the output of the
8:07
third input inverter this makes it so
8:09
all of the inputs go into the third nand
8:11
gate are on which turns the output off
8:14
resulting in the output inverter turning
8:17
the subtract command value on the
Control Matrix
8:19
control Matrix uses the opcode decoder
8:22
and ring counter to determine when to
8:24
enable circuits some circuits are
8:26
enabled with a high signal which is
8:28
noted with a plus sign other circuits
8:30
are enabled with a low signal which is
8:32
ground and noted with a negative sign
8:34
let’s look at this circuit to explain
8:36
how the control Matrix works when the
8:39
opcode decoder has load a on and the
8:42
ring counter goes to three both inputs
8:44
into the top nand gate are on this turns
8:46
the top nand gate off which enables the
8:49
load a value to be sent to the data bus
8:51
from memory since the top nand gate is
8:54
off it also turns the three input nand
8:57
gate on which sends the load a register
8:59
command the result is that the a
9:01
register latches in the low day value
9:03
most of the other control Matrix
9:05
circuits work in a similar way the data
Data Bus
9:07
bus is a useful way for signals to be
9:09
sent to and from each part of the
9:11
computer the four data lines of the data
9:13
bus have pull-up resistors that connect
9:15
to positive 5 volts this makes it so
9:18
that by default all the data lines are
9:20
on when a circuit sends data to the data
9:23
bus it is actually providing the pull-up
9:25
resistors a direct path to ground for
9:27
any value that is off if a value is on
9:30
the data line just stays on this might
9:32
seem counter-intuitive as it is common
9:34
to think of a positive signal as being
9:37
sent out the other lines of the data bus
9:39
include ground positive 5 volts the
9:42
clock signal and clear the accumulated
Accumulator Register
9:45
register is built with four Master Slave
9:47
data flip-flops the top breadboard
9:49
contains Tri-State buffers which allow
9:51
the EA register to send current value to
9:54
the data bus data is latched into the a
9:57
register from the data bus when a load a
10:00
command is sent from the control Matrix
10:02
by having what is normally the clock
10:04
input floating on which means the clock
10:06
input is always on makes it so that the
10:09
a register latches its value at the very
10:11
end of a full clock cycle this helps to
10:13
ensure consistent latching behavior of
10:15
the a register the output of the a
10:17
register is continuously being sent into
10:20
the ALU the B register is built with
B Register
10:22
four data flip-flops these are not
10:24
Master Slave data flip-flops or Edge
10:27
trigger JK flip-flops they are just
10:29
regular data flip-flops each flip-flop
10:32
input has a buffer the clock gate which
10:34
is an and gate is enabled with a high
10:37
clock signal and high load B command
10:39
from the control Matrix when the clock
10:42
gate is on it latches the data from the
10:44
data bus into register B the latch data
10:47
is then continuously being sent into the
10:49
ALU the ALU is built with four full
ALU
10:53
adders which allows the circuit to add
10:55
two 4-bit inputs it also has four xor
10:58
subtract Gates which when enabled allows
11:00
the ALU to compute a minus B the bottom
11:03
of the ALU contains Tri-State buffers
11:06
which enables the ALU output value to be
11:08
sent to the data bus if you would like
11:11
to learn more about how the ALU works I
11:13
do have two other videos about this
Output Register
11:15
finally the output register uses four
11:17
regular data flip-flops just like
11:19
register B this register is very basic
11:22
and simply latches the final value of
11:24
the program and displays the result the
11:27
data bus value gets latched into the
11:29
register when the clock gate receives a
11:31
high clock signal and a high enable
11:33
command from the control Matrix
Building Suggestions
11:35
a cool thing about this computer is you
11:37
can build it one section at a time if
11:39
you want to start building it I would
11:41
recommend starting with a 4-bit
11:42
calculator that will turn into the ALU
11:44
then build the clock data bus and
11:47
accumulator register if you can build
11:49
those you have a good understanding of
11:51
how to build the Entire Computer
11:53
I drew the circuit diagram of the
11:55
computer at the logic gate level if you
11:57
do not know how to build digital logic
11:58
gates or flip-flops from Individual
12:00
transistors I have in-depth videos about
12:02
these topics the only other person I
12:05
know of in recent history that built a
12:07
transistor computer on breadboards is
12:09
Jerry Walker and he wrote a book about
12:11
it which I would recommend his computer
12:14
was actually eight bits there are a lot
12:16
of people that built computers on
12:17
breadboards using integrated circuits
12:19
this is a quicker way to build a
12:21
breadboard computer but I like seeing
12:23
exactly how each circuit is built by
12:25
using individual transistors this really
12:28
helps understand the fundamentals when
12:30
building a computer this way it is
12:31
actually more thought-provoking than I
12:33
anticipated and it becomes clear that
12:35
there are tons of ways to make
12:36
improvements I will be making more
12:38
videos about how this computer is built
12:40
if you would like to watch the next
12:41
video click here thanks for watching